Seminar by Mr.Sunil Kakkar
Advances in verification technology and current challenges
Mr Sunil Kakkar
Head, Verification Technology Group
Freescale Semiconductors, India
Date: Tue, Dec 28, 2004
Time: 4:00 PM
Venue: CS-101
About the Speaker
Sunil Kakkar has over 20 years of experience in Processor Architecture, Performance and Functional Verification and has successfully led large design verification and performance analysis teams that have ended up handing off fully functional first silicon to the manufacturing and the test teams. Holding a Bachelor's degree from IIT-Kanpur and two Master's degrees from the University Of Illinois, Sunil holds a patent for a specialized microprocessor verification flow technique that he invented at Sony and which led to bug free first silicon. Sunil has also taught at the University of Berkeley program for industry professionals. He has also invented a VDL (Verification Design Language) which when used to specify a digital design at a higher level of abstraction can be used to generate testbenches automatically in any HDL or high level language. Sunil was invited to chair an IEEE Computer Society Conference session on Verification. Sunil has worked for companies like Hewlett Packard, IDT and Transmeta. He is currently heading the verification technology strategy group at Freescale semiconductor in India.