| Lecture weeks | Lecture Content | Slides | Reading | Additional material and HW |
|---|---|---|---|---|
| 29/07 - 29/07 | Course logistics and Introduction | fch introduction | H & P: Ch1 (till 1.7) P & H: Ch1 (till 1.3) | OSTEP Ch2 Malloc Internals Turing Award Lecture |
| 01/08 - 05/08 | Performance Analysis | perf1 perf2 | H & P: Ch1 (1.8-1.12) | Homework: slide#10 Homework: slide#13 #20 |
| 08/08 - 18/08 | Simulation,Tracing, ISA | tracing isa | H & P (Appendix A), P & H (Ch 2) | Pin Manual Champsim ISA Wars, Blem et al. |
| 22/08 - 26/08 | Architecture, Instruction pipelining | microarch pipelining | H & P (Appendix C), P & H (Ch 4) | Pipeline Architecture |
| 29/08 - 02/09 | Branch Prediction, Motivating OOO | lecture1 lecture2 | H & P (Ch3, Appendix C), P & H (Ch 4) | Branch Pred. survey Homework: slide#23 |
| 05/09 - 10/09 | OOO execution, Scoreboard, Tomasulo, Project Topics | lecture1 lecture2 | H & P (Appendix C, Ch3) | Smith et al. |
| 12/09 - 16/09 | Speculative and Superscalar | lecture1 lecture2 | H & P (Appendix C, Ch3) | P4 Arch(Hinton et al. Intel Tech. J.) |
| 10/10 - 14/10 | Memory Hierarchy | lecture1 lecture2 assignment2 | P & H (Ch5) H & P (Appendix B, Ch2) | Jaleel et al. HW Prefetching (Paklapati et al) |
| 17/10 - 21/10 | More on caches | RRIP VM and caches | P & H (Ch5) H & P (Appendix B, Ch2) | DIP Tempo |
| 24/10 - 28/10 | Dynamic Associativity, Project presentations | V-Way Cache (Author slides) | P & H (Ch5) H & P (Appendix B, Ch2) | V-Way Cache, Qureshi et al. |
| 31/10 - 04/11 | SIMD, Vector Architecture, SIMD extensions | lecture1 lecture2 | H & P (Ch4) | Intel MMX, Peleg et al. |