Publications

Book Chapters

  1. Verifying Security Properties in Modern SoCs using Instruction-Level Abstractions.
    Pramod Subramanyan and Sharad Malik.
    Hardware IP Security and Trust, edited by Prabhat Mishra, Swarup Bhunia and Mark Tehranipoor. Springer-Verlag, January 2017.

  2. Boolean Satisfiability: Solvers and Extensions. (PDF)
    Georg Weissenbacher, Pramod Subramanyan and Sharad Malik.
    Software Systems Safety, IOS Press, May 2014.


Journal Papers

  1. Functional Analysis Attacks on Logic Locking. (arXiv) (Code)
    Deepak Sirone and Pramod Subramanyan.
    IEEE Transactions on Information Forensics and Security, (TIFS). 2020.

  2. Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. (PDF)
    Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, and Sharad Malik.
    ACM Transactions on Design Automation of Electronic Systems, (TOADES). 2018.

  3. Template-based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification. (PDF)
    Pramod Subramanyan, Bo-Yuan Huang, Yakir Vizel, Aarti Gupta and Sharad Malik.
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (TCAD). 2018.

  4. Reverse Engineering Digital Circuits Using Structural and Functional Analyses. (PDF)
    Pramod Subramanyan, Nestan Tsiskaridze, Wenchao Li, Adria Gascon, Wei Yang Tan, Ashish Tiwari, Natarajan Shankar, Sanjit A. Seshia and Sharad Malik.
    Proceedings of IEEE Transactions on Emerging Topics in Computing: Special Issue on Nanoscale Architectures for Hardware Security, Trust and Reliability, (TETC). March 2014.


Conference Papers

  1. Verification of Quantitative Hyperproperties via Trace Enumeration Relations. (PDF) (Extended version) (Code)
    Shubham Sahai, Pramod Subramanyan and Rohit Sinha.
    International Conference on Computer Aided Verification. (CAV 2020). Los Angeles, CA. July 2020.

  2. (Invited) Towards Verifiably Secure Systems-on-Chip Platforms. (PDF)
    Sujit Kumar Muduli and Pramod Subramanyan.
    IEEE Asian Test Symposium. (ATS 2019). Kolkata, India. December 2019.

  3. Verification of Authenticated Firmware Loaders. (IACR) (Code)
    Sujit Kumar Muduli, Pramod Subramanyan and Sayak Ray.
    Formal Methods in Computer-Aided Design. (FMCAD 2019). San Jose, CA. October 2019.

  4. A Formal Approach to Secure Speculation. (IACR)
    with Kevin Cheang, Cameron Rasmussen and Sanjit Seshia.1
    IEEE Computer Security Foundations Symposium. (CSF 2019). Hoboken, NJ. June 2019.

  5. Functional Analysis Attacks on Logic Locking. (PDF) (Extended version on arXiv) (Code)
    Deepak Sirone and Pramod Subramanyan.
    Design Automation and Test in Europe. (DATE 2019). Florence, Italy. March 2019.

  6. (Invited) UCLID5: Integrating Modeling, Verification, Synthesis and Learning. (PDF) (Code)
    with Sanjit A. Seshia.1
    ACM-IEEE International Conference on Formal Methods and Models for System Design. (MEMOCODE 2018). Beijing, China. October 2018.

  7. Lazy Self-Composition for Security Verification. (PDF)
    Weikun Yang, Yakir Vizel, Pramod Subramanyan, Aarti Gupta and Sharad Malik.
    International Conference on Computer Aided Verification. (CAV 2018). Oxford, UK. July 2018.

  8. (Best Paper) A Formal Foundation for Secure Remote Execution of Enclaves. (PDF) (IACR) (Code)
    Pramod Subramanyan, Rohit Sinha, Ilia Lebedev, Srinivas Devadas and Sanjit Seshia.
    ACM Conference on Computer and Communications Security. (CCS 2017). Dallas, TX. October 2017.

  9. Malware Detection using Machine Learning Based Analysis of Virtual Memory Access Patterns. (PDF)
    Zhixing Xu, Sayak Ray, Pramod Subramanyan and Sharad Malik.
    Design Automation and Test in Europe. (DATE 2017). Lausanne, Switzerland. March 2017.

  10. (Invited) Specification and Modeling for Systems-on-Chip Security Verification. (PDF)
    Sharad Malik and Pramod Subramanyan.
    Design Automation Conference. (DAC 2016), Austin, TX. June 2016.

  11. Verifying Information Flow Properties of Firmware using Symbolic Execution. (PDF)
    Pramod Subramanyan, Sharad Malik, Hareesh Khattri, Abhranil Maiti and Jason Fung.
    Design Automation and Test in Europe. (DATE 2016). Dresden, Germany, March 2016.

  12. Template-based Synthesis of Instruction-Level Abstractions for SoC Verification. (PDF)
    Pramod Subramanyan, Yakir Vizel, Sayak Ray and Sharad Malik.
    Formal Methods in Computer-Aided Design. (FMCAD 2015). Austin, TX, September 2015.

  13. (Best Student Paper) Evaluating the Security of Logic Encryption Algorithms. (PDF) (Code)
    Pramod Subramanyan, Sayak Ray and Sharad Malik.
    IEEE Hardware-Oriented Security and Trust. (HOST 2015). McLean, VA, May 2015.

  14. Template-based circuit understanding. (PDF)
    Adria Gascon, Pramod Subramanyan, Bruno Dutertre, Ashish Tiwari, Dejan Jovanovic and Sharad Malik.
    Formal Methods in Computer-Aided Design. (FMCAD 2014). Lausanne, Switzerland, October 2014.

  15. Formal Verification of Taint-propagation Security Properties in a Commerical SoC Design. (PDF)
    Pramod Subramanyan and Divya Arora.
    Design Automation and Test in Europe. (DATE 2014). Dresden, Germany, March 2014.

  16. All-SAT using Minimal Blocking Clauses. (PDF)
    Yinlei Yu, Pramod Subramanyan, Nestan Tsiskaridze and Sharad Malik.
    VLSI Design Conference. (VLSID 2014). Mumbai, India, January 2014.

  17. WordRev: Finding Word-Level Structures in a Sea of Bit-Level Gates. (PDF)
    Wenchao Li, Adria Gascon, Pramod Subramanyan, Wei Yang Tan, Ashish Tiwari, Sharad Malik, Natarajan Shankar and Sanjit A. Seshia.
    IEEE Hardware-Oriented Security and Trust. (HOST 2013). Austin, TX, June 2013.

  18. Reverse Engineering Digital Circuits Using Functional Analysis. (PDF) (Code)
    Pramod Subramanyan, Nestan Tsiskaridze, Kanika Pasricha, Dillon Reisman, Adriana Susnea and Sharad Malik.
    Design Automation and Test In Europe. (DATE 2013). Grenoble, France, March 2013.

  19. Adaptive Execution Assistance for Multiplexed Fault-Tolerant Chip Multiprocessors. (PDF)
    Pramod Subramanyan, Virendra Singh, Kewal Saluja and Erik Larsson.
    International Conference on Computer Design. (ICCD 2011). Amherst, MA, October 2011.

  20. Energy-Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding. (PDF)
    Pramod Subramanyan, Virendra Singh, Kewal Saluja and Erik Larsson.
    IEEE/IFIP International Conference on Dependable Systems and Networks. (DSN 2010). Chicago, IL, June 2010.

  21. Energy-Efficient Redundant Execution in Chip Multiprocessors. (PDF)
    Pramod Subramanyan, Virendra Singh, Kewal Saluja and Erik Larsson.
    ACM Great Lakes Symposium on VLSI. (GLSVLSI 2010). Providence, RI, May 2010.

  22. Multiplexed Redundant Execution: A Technique for Efficient Fault Tolerance in Chip Multiprocessors. (PDF)
    Pramod Subramanyan, Virendra Singh, Kewal Saluja and Erik Larsson.
    Design Automation and Test in Europe. (DATE 2010). Dresden, Germany, March 2010.

  23. Accelerating Signal Processing Applications Using Graphics Processors. (PDF)
    Ashwin Prasad and Pramod Subramanyan.
    National Conference on Communications. (NCC 2008). Mumbai, India, February 2008.


Workshop Papers

  1. Generation of Minimal Leakage Input Vectors with Constrained NBTI Degradation. (PDF)
    Pramod Subramanyan, Ram Rakesh Jangir, Jaynarayan Tudu, Erik Larsson and Virendra Singh.
    East-West Design and Test Workshop. (EWDTS 2009). Moscow, Russia, September 2009.

  2. Power-Efficient Redundant Execution for Chip Multiprocessors. (PDF)
    Pramod Subramanyan, Virendra Singh, Kewal Saluja and Erik Larsson.
    Workshop on Dependable and Secure Nanocomputing held in conjuction with DSN 2009. (WDSN 2009). Lisbon, Portugal, June 2009.


Theses

  1. Deriving Abstractions to Address Hardware Platform Security Challenges (PDF)
    Pramod Subramanyan.
    Ph.D. Thesis, Princeton University. January 2017.
    Awarded the ACM SIGDA Outstanding Ph.D. Dissertation Award in Electronic Design Automation.
    Awarded the Bede Liu Award for the Best Doctoral Thesis, Department of Electrical Engineering, Princeton University.

  2. Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding. (PDF)
    Pramod Subramanyan.
    M.Sc (Engg.) Thesis, Indian Institute of Science. June 2011.
    Awarded the Subramaniam Rajalakshmi Medal for the Best M.Sc (Engg.) Thesis at SERC, IISc.

1Authors in alphabetical order of last names.