Title: Reverse Engineering the Stream Prefetcher for Profit.


Abstract:
Micro-architecture attacks exploit the timing channels at
the different micro-architecture units. Some of the micro-
architecture units like cache, automatically provide the timing
difference (difference between a hit and a miss). However,
there are other units that are not documented and their influ-
ence on the timing difference is not fully understood. One
such micro-architecture unit is an L2 hardware prefetcher
named streamer. We make an attempt to reverse engineer
the stream prefetcher, which is commercially available in the
Intel machines. We describe a set of experiments and our
observations that can help future timing channel attackers to
exploit the stream prefetcher for information leakage.