General Information

Sanjeev K Aggarwal is with the Department of Computer Science and Engineering at IIT Kanpur where he was the head of the department during Aug 2002-Dec 2005. He has about twenty years of reserach and teaching experience in the area of Compiler Design. For his PhD thesis, he worked on Automatic code Generation problem and developed a frame work for retargetable code generation (advisor Professor Vishv M Malhotra). This work was later used in Industrial compilers. He has published extensively in international forums and has handled a large number of industry/government funded projects.

He worked with Tata Research Development and Design Centre, Pune from 1986 to 1990. At TRDDC he was project leader for CHILL compiler suite which were developed for C-DOT's digital switches. The project involved development of highly optimizing CHILL compilers and debuggers. This was a large project involving about 12 programmers over a period of three years. He has hands on experience with compiler development, testing and project management.

His main theme of the work is program analysis to improve quality of code for multi-core and advanced computer archiecture, and to check and verify properties of programs. The related areas are Grid Computing, High Performance Computing, Compilers for High Performance Architectures, Compiler Design, Code Optimization, Code Generation, and Application of Language Processing Technology in Tools for Software Engineering. He has been teaching courses on Grid Computing, Compiler Design, Compilers for High Performance Architectures, and Programming languages.

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2011-01-25