Design and implementation of a RISC Processor(in Verilog) A processor based on MIPS R10K instruction set (integer unit only) was implemented in verilog, We designed the logic for pipelining, bypass hardware, hazard detection unit, on chip data and instruction caches and a priority resolution policy between the two. The system was tested by running actual C programs on them. This work was done as part of the course "Computer Architecture" under the guidance of Dr. Mainak Choudhuri, CSE, IITK.

Design and Implementation(in Verilog) of an AHB Arbiter In this project done in group of four students we designed the bus arbiter according to AMBA-AHB specifications, for a SOC (System On Chip) comprising processor,memory and other components on an AMBA-AHB bus. This was done as part of "Design Methodologies for Embedded System" course under guidance of Prof. Rajat Moona, CSE, IITK.

Server Side Web Personalization We proposed a hybrid model of web personalization which involves web clustering based on the web server logs and predicting user's next click based on the click stream. This work was done as part of the course `Knowledge Discovery' under guidance of Prof. Pabitra Mitra, CSE, IITK.

Algorithm for estimating Count Distinct Queries in Streaming Model Designed algorithms for estimating the number of distinct elements on a general update data stream. The algorithm can be adapted with minor changes for set expression cardinality problem estimation.This project was done as part of the course `Data Streaming Algorithms and Systems' under guidance of Prof. Sumit Ganguly, CSE, IITK.

Design of Novel Algorithm for estimating Inversions between two data-streams Designed algorithms for estimating the number of inversions in insert only data streams. This work was done as part of the course "Parallel Semi-Numerical and Non-Numerical Algorithms" under the guidance of Prof. Phalguni Gupta, CSE, IITK.

Design of GUI based firewall configuration tool in Linux In this project done in group of two students we developed a GUI (using Qt designer) for setting up aniptables based packet-filtering firewall. This work was done as part of undergraduate curriculum under guidance of Mr. Samit Pahari, Information Scientist Jadavpur University.